The present invention relates generally to memory storage devices and more particularly to drivers circuits for reading and writing in memories using field effect transistor devices.
In the field of integrated circuit memories, the use of bipolar transistors in the driving circuit is well-known. To reduce power dissipation and increase response time, field effect transistors memories have been designed and used. For programmable memories, high voltages are needed to program, write, or store information in the memory elements. Because the programming or writing current and potentials are substantially higher than the reading currents or potentials, generally P channel field effect transistors have been used as the driver circuits. The use of a single polarity or channel devices lead to unnecessary complication of the drivers circuit besides increasing the size required for the drivers of memories. Using all N channel devices will not provide the capacity for the writing or programming potentials and currents and P channel devices alone do not have the speed which is desired for reading the memory devices.
Thus there exists a need for reading and writing drive circuits which have a minimum amount of delay during the reading cycle and which are capable of handling high potentials and currents during the writing cycle.